align="justify"> -
- Description:
-
- Design unit header - IEEE; IEEE.std_logic_1164.all;
- other libraries declarations
- synopsys translate_off VIRTEX; IEEE; IEEE.vital_timing.all;
- synopsys translate_on FE is (: in STD_LOGIC;: in STD_LOGIC;: out STD_LOGIC;: out STD_LOGIC
); FE; FE of FE is
--- Component declarations ----- pt (: in STD_LOGIC;: in STD_LOGIC;: in STD_LOGIC;: in STD_LOGIC;: out STD_LOGIC;: out STD_LOGIC
); component; ptgen (: out STD_LOGIC;: out STD_LOGIC
); component; sbros (: out STD_LOGIC
); component; spt (: in STD_LOGIC;: in STD_LOGIC;: in STD_LOGIC;: in STD_LOGIC;: out STD_LOGIC;: out STD_LOGIC
); component; Vosstan (: out STD_LOGIC
); component; VCC
- synopsys translate_off (: STRING:=«*»;: BOOLEAN:=False;
TimingChecksOn: BOOLEAN:=false;: BOOLEAN:=TRUE
);
- synopsys translate_on (: out std_ulogic:=«1»
); component;
--- Signal declarations used on the diagram ---- NET101: STD_LOGIC; NET260: STD_LOGIC; NET264: STD_LOGIC; NET276: STD_LOGIC; NET308: STD_LOGIC; NET387: STD_LOGIC; NET394: STD_LOGIC; NET398 : STD_LOGIC; NET404: STD_LOGIC; NET414: STD_LOGIC; NET418: STD_LOGIC; NET422: STD_LOGIC; NET453: STD_LOGIC; NET458: STD_LOGIC; NET572: STD_LOGIC; NET576: STD_LOGIC; NET639: STD_LOGIC; NET707: STD_LOGIC; NET716: STD_LOGIC; NET97: STD_LOGIC ;
--- Configuration specifications for declared components
- synopsys translate_offU6: VCC use entity VIRTEX.VCC;
- synopsys translate_on
- synopsys translate_offU7: VCC use entity VIRTEX.VCC;
- synopsys translate_on
--- Component instantiations ----: sptmap (=> In1, => NET97, => NET101, => In2, => NET260, => NET264
); <= not (NET639); <= not (NET422); <= not (NET418); <= NET639 and NET414; <= not (NET453); < ;=NET572 and NET458; <= NET716; <= NET707;: sbrosmap (=> NET572
);: ptgenmap (=> NET97, => NET101
);: Vosstanmap (=> NET387
);: ptmap (=> NET394, => NET308, => NET387, => NET707, => NET716, => NET398
);: ptmap (=> NET716, => NET576, => NET276, => NET264, => NET260, => NET707
);: VCCmap (=> NET308
);: VCCmap (=> NET276
); <= not (NET404); <= NET398 xor NET394; FE;
-------------------------------------------------------------------------------------------
- Title: 2-4 СПТ
- Design: First
- Author: 123
- Company: 456
- Description:
- Design unit header - IEEE; IEEE.std_logic_1164.all; spt is (: in STD_LOGIC;: in STD_LOGIC;: in STD_LOGIC;: in STD_LOGIC;: out STD_LOGIC;: out STD_LOGIC
); spt; spt of spt is
--- Signal declarati...
